Sr Staff Application Engineer

Sr Staff Application Engineer Pavia, Italy €75,000 to €110,000 Bonus SIGNING BONUS Paid Relocation Responsibilities: Support internal or external teams on system-level debugging. Analyze bring-up, debug, and characterize silicon-level internal IPs such as High-Speed SerDes for various semiconductor products. Evaluate and debug new features in PHY, develop driver firmware, collect performance data, and resolve application and production issues, including Ethernet and PCIe products. Provide direct technical support to top-tier customers, review designs, discuss questions, and help tune performance to meet system requirements. Develop and execute bench-level validation test plans and develop scripts in Python, VBA, and MATLAB to automate testing. Generate test reports and write application notes. Provide technical support to customers for resolving technical issues and furnish collateral documentation related to technical matters. Act as a primary technical interface between the company and customers. Qualify design activity at the customer engineering level and participate in defining new products and identifying niche areas with new opportunities. Location: Pavia, Italy. Work Model: Full-time, on-site. What We're Looking For Bachelor’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Engineering/Science, or related field, with five (5) years of relevant experience. A Master’s or Ph.D. in Electrical/Electronic Engineering is preferable. Strong fundamentals in communication, transmission lines, EM, microwave theories. Experience in test script generation in Python, VBA, MATLAB, or other languages. Proficiency in debugging with equipment like Oscilloscopes (Keysight, Tektronix, Teledynelecroy), TDR, VNA, Logic Analyzers. Experience with bench analysis tools like BERT and AWG is a plus. Experience performing 5G, 10G, 25G NRZ, and 53G PAM-4 Transmitter Compliance tests using IEEE compliant fixtures is a plus. Knowledge of electrical compliance testing for PCIe Gen4/5 using PCI-SIG compliance boards is a plus. Experience with high-speed SerDes PCB design and system applications. Ability to create and perform validation test cases and generate comprehensive reports. Good communication skills and willingness to travel. Fluent in English, both spoken and written. J-18808-Ljbffr

Location: Pavia, Lombardia, IT

Posted Date: 8/18/2025