Test Engineer

Staff DFT Design Engineer Barcelona This is a fantastic opportunity for a DFT Engineer to join a European technology company headquartered in Barcelona! You will join them at a critical stage and be working at the forefront of designing next-generation accelerator chips. Specializing in high-performance computing and artificial intelligence. They have a firm focuses on developing energy-efficient processors using RISC-V architecture. Key Responsibilities: Work on design execution of silicon design. Work on SoC DFT architecture and DFM concept. Work on the implementation and verification of DFT measures to meet product specifications and production requirements. Work closely with cross-function teams (design, production test and qualification) to meet test requirements with effective DFT solutions. Contribute to target coverage requirements for logic, memories, IO and mixed-signal IPs. Generate test patterns and support post-silicon ATE and QnR. Required Skills and Experience: 10 years of experience gained in IC digital design with multiple cycles of DFT and RTL design. Good knowledge of MBIST Insertion, Compression Insertion, Scan Stitching, OCC insertion, iJTAG. Good Knowledge of ATPG, Pattern Generation, Simulation. Understanding of basic commands of EDA/Simulation tools, e.g. Tessent, VCS Hands on Experience in DFT Flow bring up using scripting languages like TCL/Perl/Makefile based. Hands on Experience in flow bring up for MBIST Insertion, EDT/OCC insertion, Scan Stitching, ATPG/Simulation Flow. Even better if you have Knowledge of NOC architecture, and/or RISC-V ISA/architecture and SOC based on this processor. Relocation and visa support can be given, to be considered you must be prepared to work 3 days per week onsite in Barcelona. For more information, please contact Rachel Mason at IC Resources.

Location: Catalonia, ES

Posted Date: 7/2/2025