DFT Engineer - MBIST/ATPG

Job Title : DFT Engineer Company : LeadSoc Technologies Pvt Ltd Location : Bengaluru, Karnataka, India About the Job : Leadsoc Technologies is seeking a DFT (Design for Test) Engineer with 5 years of experience. The ideal candidate should possess expertise in the following areas : Responsibilities : ATPG (Automatic Test Pattern Generation) : - Generate test patterns for digital circuits to ensure they can be tested for faults. - Work with industry standard ATPG tools (e.g., Synopsys TetraMAX, Cadence Modus) to develop and implement ATPG flows. - Perform fault simulation to evaluate test coverage and improve test pattern quality. - Optimize ATPG parameters and constraints to achieve high fault coverage and minimize test time. - Debug and analyze test failures to identify design weaknesses and improve testability. MBIST (Memory Built-In Self-Test) : - Implement memory self-test solutions for embedded memory blocks. - Design, develop, and verify MBIST controllers and algorithms. - Work with memory vendors to understand memory BIST requirements and specifications. - Perform MBIST simulations to validate functionality and coverage. - Analyze MBIST test results to identify memory failures and improve memory reliability. JTAG (Joint Test Action Group) : - Implement boundary scan testing, particularly for devices with JTAG interface. - Design and develop JTAG controllers and interfaces in RTL. - Generate and validate JTAG test patterns for board-level testing and device programming. - Utilize JTAG tools and protocols for debugging, testing, and programming devices. - Work with board designers to ensure proper JTAG implementation and testability. DFT Architecture and Implementation : - Develop and implement DFT architectures for complex digital designs, including scan insertion, compression techniques, and other advanced DFT methodologies. - Collaborate with design teams to integrate DFT structures into RTL code. - Perform DFT rule checks and ensure design compliance with DFT guidelines. - Work with synthesis and physical design teams to ensure DFT implementation meets timing, power, and area constraints. Testability Analysis : - Perform testability analysis to identify potential testability issues in the design. - Provide recommendations for DFT improvements to enhance testability and reduce test costs. - Work with design teams to implement DFT solutions to address testability concerns. Post-Silicon Validation : - Support post-silicon validation and debug of DFT features. - Work with test engineers to bring up DFT modes and execute test patterns on silicon. - Analyze test results from silicon to identify and resolve design and DFT issues. - Generate test vectors for production testing. Tool and Scripting : - Utilize industry-standard DFT tools from vendors like Synopsys, Cadence, and Mentor Graphics. - Develop and maintain scripts (e.g., TCL, Perl, Python) to automate DFT flows and improve efficiency. Qualifications : - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. - 5 years of experience in DFT (Design for Test) engineering. Technical Skills : - Strong knowledge of DFT concepts and methodologies. - Expertise in ATPG (Automatic Test Pattern Generation) tools and techniques. - Proficiency in MBIST (Memory Built-In Self-Test) design and implementation. - In-depth understanding of JTAG (Joint Test Action Group) and boundary scan testing. - Experience with industry-standard DFT tools (e.g., Synopsys TetraMAX, Cadence Modus). - Solid understanding of digital design principles and RTL coding Familiarity with scripting languages (e.g., TCL, Perl, Python). - Knowledge of fault modeling and fault simulation. - Understanding of scan insertion, compression techniques, and other advanced DFT methodologies. - Experience with post-silicon validation and debug of DFT features. Preferred Skills : - Experience with low-power DFT techniques. - Knowledge of 3D IC DFT architectures. - Familiarity with automotive DFT requirements (e.g., ISO 26262). - Strong problem-solving and analytical skills. - Excellent communication and teamwork skills. (ref:hirist.tech)

Location: bangalore, IN

Posted Date: 5/15/2025