Aion Silicon

Physical Design Engineer

Job Location

madrid, Spain

Job Description

Join our growing team in Barcelona as a Physical Design Engineer . As part of a dynamic physical implementation design team, you will be responsible for block development and potentially full chip responsibility, taking designs from RTL to GDS. This is an exciting opportunity for a self-motivated, detail-oriented individual passionate about developing high-quality, cutting-edge designs. Key Responsibilities: Contribute to physical design projects with minimal supervision, ensuring high-quality results. Address and resolve moderate complexity design challenges through sound judgment and quantitative analysis. Take ownership of various aspects of the physical design flow from RTL to GDS, ensuring timely and accurate delivery. Manage multiple projects from different teams or clients, meeting deadlines and quality standards. Collaborate closely with team members to resolve design issues, utilizing expertise in physical design tools and techniques. Demonstrate proficiency in tools such as Synthesis, PnR, Formal verification, Custom layout, Analog simulation, or Chip finishing. Contribute to technical white papers and presentations. Support sales activities, including Statement of Work preparation. Maintain effective time management and workload organization. Execute tasks efficiently, adhering to best practices and maintaining high standards of work. Key Relationships: Internal: Reports to Engineering Manager / Principal Engineer; collaborates with Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, HR; supervises 2-3 engineers in the Physical Design Team. External: Communicates minimally with customers and interacts with EDA tool vendors, foundries, and assembly houses. Qualifications: Essential: Degree, Master's, or PhD in a relevant field with 5 years of physical design experience. Desirable: Advanced degree with similar experience. Skills & Experience: Experience with tapeout across multiple technologies (e.g., 5nm, 7nm, 12nm, 28nm). Knowledge of physical verification checks (DRC, LVS, ANTENNA, ERC). Strong understanding of synthesis, floorplanning, placement, CTS, routing, and STA. Proficiency with tools like Synopsys ICC, Cadence EDI, Mentor Olympus, Synopsys DC, Cadence RC, and formal verification tools. Strong scripting skills in Tcl, Perl, or Python. Proven project management skills with timely delivery. Attributes: Excellent self-organization and adaptability. Leadership abilities to guide a small team. Ability to work under pressure and manage multiple projects. Attention to detail and commitment to quality. Why Sondrel? At Sondrel, we are passionate about digital design innovation. Join our Barcelona office to work on cutting-edge ASIC projects within a collaborative environment. This role offers significant responsibility and influence on major projects. If you are a skilled Physical Design Engineer with a passion for technology and leadership, we would love to hear from you! J-18808-Ljbffr

Location: madrid, ES

Posted Date: 5/14/2025
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Aion Silicon

Posted

May 14, 2025
UID: 5182751373

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